Background and motivation
Modelling and Simulation saves an estimated 40% of semiconductor technology development costs and time, and Technology Computer Aided Design (TCAD) is instrumental in achieving these savings.
Also, TCAD enables an early assessment of new technology options at the circuit level, assists the interpretation of experimental data and the extraction of physical parameter and it is the entry point for proof of concept of new device designs.
Therefore, TCAD solutions should be ready well in advance of technology transfer into manufacturing. Up to now TCAD vendors are not in the position of offering to their customers dependable and predictive simulation tools for nanoscale III-V semiconductor n-MOS transistors as those foreseen by the ITRS for the ultimate CMOS technology nodes. In fact, TCAD for III-V semiconductors and devices is remarkably less developed than for Si, and TCAD compact models used to extend TCAD into the nanometer scale are often only semi-empirical. An urgent need exists to enhance the existing simulation capability by means of new TCAD compact models, developed and tested by comparison to experimental results on real devices.
The III-V-MOS project aims at addressing these needs by proposing a structured effort to deliver calibrated and validated TCAD simulations for III-V n-MOSFETs to the research centers, the labs and the semiconductor industry in the timely manner necessary to unlock the potential of III-V semiconductors for More Moore and, to some extent, even More than Moore and Beyond CMOS applications.
The ultimate goal is to leverage the existing strong semiconductor device modeling and simulation knowledge in Europe and to enable fast and effective design of new n-MOS transistors for high performance electronics at low power supply voltage hence, with greatly reduced power consumption.